MC68000 INSTRUCTION EXECUTION TIMES ( TAB-SIZE = 4 ) In this data it is assumed that both read and write cycle times are four clock periods. The number of read or write cycles isenclosed in parenthesis (R/W) following the number of clock periods. Any questions/suggestions or... -> contact me: Nobody of Condemned Viisarikiventie 15 90650 OULU 65 FINLAND DO NOT CHANGE THIS !!!! OR... ( CALL CEMETERY BBS +358-81-5302117 OPEN DAILY 22.00-07.00 !!!!! ) TABLE 1 EFFECTIVE ADDRESS CALCULATION TIMES ----------------------------------------------------------------------------------------- | Addressing Mode | Word | Long | ----------------------------------------------------------------------------------------- | Dn | Data Register Direct | 0(0/0) | 0(0/0) | | An | Address Register Direct | 0(0/0) | 0(0/0) | ----------------------------------------------------------------------------------------- | (An) | Address Register Indirect | 4(1/0) | 8(2/0) | | (An)+ | Address Register Indirect with Postincreament | 4(1/0) | 8(2/0) | ----------------------------------------------------------------------------------------- | -(An) | Address Register Indirect with Predecreament | 6(1/0) | 10(2/0) | | d(An) | Address Register Indirect with Displacement | 8(2/0) | 12(3/0) | ----------------------------------------------------------------------------------------- | d(An, Rn)* | Address Register Indirect with Index | 10(2/0) | 14(3/0) | | xxx.W | Absolute Short | 8(2/0) | 12(3/0) | ----------------------------------------------------------------------------------------- | xxx.L | Absolute Long | 12(3/0) | 16(4/0) | | d(PC) | Program Counter with Displacement | 8(2/0) | 12(3/0) | ----------------------------------------------------------------------------------------- | d(PC, Rn)* | Program counter with Index | 10(2/0) | 14(3/0) | | #xxx | Immediate | 4(1/0) | 8(2/0) | ----------------------------------------------------------------------------------------- * The size of the index register does not affect execution time TABLE 2 MOVE BYTE AND WORD INSTRUCTION EXECUTION TIMES ----------------------------------------------------------------------------------------- | Source | Destination | | | Dn | An | (An) | (An)+ | -(An) | d(An) |d(An,R)| xxx.W | xxx.L | ----------------------------------------------------------------------------------------- | Dn | 4(1/0)| 4(1/0)| 8(1/1)| 8(1/1)| 8(1/1)|12(2/1)|14(2/1)|12(2/1)|16(3/1)| | An | 4(1/0)| 4(1/0)| 8(1/1)| 8(1/1)| 8(1/1)|12(2/1)|14(2/1)|12(2/1)|16(3/1)| | (An) | 8(2/0)| 8(2/0)|12(2/1)|12(2/1)|12(2/1)|16(3/1)|18(3/1)|16(3/1)|20(4/1)| ----------------------------------------------------------------------------------------- | (An)+ | 8(2/0)| 8(2/0)|12(2/1)|12(2/1)|12(2/1)|16(3/1)|18(3/1)|16(3/1)|20(4/1)| | -(An) |10(2/0)|10(2/0)|14(2/1)|14(2/1)|14(2/1)|18(3/1)|20(3/1)|18(3/1)|22(4/1)| | d(An) |12(3/0)|12(3/0)|16(3/1)|16(3/1)|16(3/1)|20(4/1)|22(4/1)|20(4/1)|24(5/1)| ----------------------------------------------------------------------------------------- | d(An, Rn)* |14(3/0)|14(3/0)|18(3/1)|18(3/1)|18(3/1)|22(4/1)|24(4/1)|22(4/1)|26(5/1)| | xxx.W |12(3/0)|12(3/0)|16(3/1)|16(3/1)|16(3/1)|20(4/1)|22(4/1)|20(4/1)|24(5/1)| | xxx.L |16(4/0)|16(4/0)|20(4/1)|20(4/1)|20(4/1)|24(5/1)|26(5/1)|24(5/1)|28(6/1)| ----------------------------------------------------------------------------------------- | d(PC) |12(3/0)|12(3/0)|16(3/1)|16(3/1)|16(3/1)|20(4/1)|22(4/1)|20(4/1)|24(5/1)| | d(PC, Rn)* |14(3/0)|14(3/0)|18(3/1)|18(3/1)|18(3/1)|22(4/1)|24(4/1)|22(4/1)|26(5/1)| | #xxx | 8(2/0)| 8(2/0)|12(2/1)|12(2/1)|12(2/1)|16(3/1)|18(3/1)|16(3/1)|20(4/1)| ----------------------------------------------------------------------------------------- * The size of the index register does not affect execution time TABLE 3 MOVE LONG INSTRUCTION EXECUTION TIMES ----------------------------------------------------------------------------------------- | Source | Destination | | | Dn | An | (An) | (An)+ | -(An) | d(An) |d(An,R)| xxx.W | xxx.L | ----------------------------------------------------------------------------------------- | Dn | 4(1/0)| 4(1/0)|12(1/2)|12(1/2)|12(1/2)|16(2/2)|18(2/2)|16(2/2)|20(3/2)| | An | 4(1/0)| 4(1/0)|12(1/2)|12(1/2)|12(1/2)|16(2/2)|18(2/2)|16(2/2)|20(3/2)| | (An) |12(3/0)|12(3/0)|20(3/2)|20(3/2)|20(3/2)|24(4/2)|26(4/2)|24(4/2)|28(5/2)| ----------------------------------------------------------------------------------------- | (An)+ |12(3/0)|12(3/0)|20(3/2)|20(3/2)|20(3/2)|24(4/2)|26(4/2)|24(4/2)|28(5/2)| | -(An) |14(3/0)|14(3/0)|22(3/2)|22(3/2)|22(3/2)|26(4/2)|28(4/2)|26(4/2)|30(5/2)| | d(An) |16(4/0)|16(4/0)|24(4/2)|24(4/2)|24(4/2)|28(5/2)|30(5/2)|28(5/2)|32(6/2)| ----------------------------------------------------------------------------------------- | d(An, Rn)* |18(4/0)|18(4/0)|26(4/2)|26(4/2)|26(4/2)|30(5/2)|32(5/2)|30(5/2)|34(6/2)| | xxx.W |16(4/0)|16(4/0)|24(4/2)|24(4/2)|24(4/2)|28(5/2)|30(5/2)|28(5/2)|32(6/2)| | xxx.L |20(5/0)|20(5/0)|28(5/2)|28(5/2)|28(5/2)|32(6/2)|34(6/2)|32(6/2)|36(7/2)| ----------------------------------------------------------------------------------------- | d(PC) |16(4/0)|16(4/0)|24(4/2)|24(4/2)|24(4/2)|28(5/2)|30(5/2)|28(5/2)|32(5/2)| | d(PC, Rn)* |18(4/0)|18(4/0)|26(4/2)|26(4/2)|26(4/2)|30(5/2)|32(5/2)|30(5/2)|34(6/2)| | #xxx |12(3/0)|12(3/0)|20(3/2)|20(3/2)|20(3/2)|24(4/2)|26(4/2)|24(4/2)|28(5/2)| ----------------------------------------------------------------------------------------- * The size of the index register does not affect execution time TABLE 4 STANDART INSTRUCTION EXECUTION TIMES --------------------------------------------------------- |Instruction| Size |op,An^ | op,Dn | op Dn, | --------------------------------------------------------- | ADD | Word | 8(1/0)+ | 4(1/0)+ | 8(1/1)+ | | | Long | 6(1/0)+** | 6(1/0)+** | 12(1/2)+ | --------------------------------------------------------- | AND | Word | - | 4(1/0)+ | 8(1/1)+ | | | Long | - | 6(1/0)+** | 12(1/2)+ | --------------------------------------------------------- | CMP | Word | 6(1/0)+ | 4(1/0)+ | - | | | Long | 6(1/0)+ | 6(1/0)+ | - | --------------------------------------------------------- | DIVS | - | - |158(1/0)+* | - | | DIVU | - | - |140(1/0)+* | - | --------------------------------------------------------- | EOR | Word | - | 4(1/0)*** | 8(1/1)+ | | | Long | - | 8(1/0)*** | 12(1/2)+ | --------------------------------------------------------- | MULS | - | - | 70(1/0)+* | - | | MULU | - | - | 70(1/0)+* | - | --------------------------------------------------------- | OR | Word | - | 4(1/0)+ | 8(1/1)+ | | | Long | - | 6(1/0)+** | 12(1/2)+ | --------------------------------------------------------- | SUB | Word | 8(1/0)+ | 4(1/0)+ | 8(1/1)+ | | | Long | 6(1/0)+** | 6(1/0)+** | 12(1/2)+ | --------------------------------------------------------- + Add effective address calculation time ^ Word or long only * Indicates maximum value ** The base time of 6cc is increased to eight if the effective address mode is register direct or immediate *** Only available effective address mode is data register direct DIVS, DIVU - The divide algorithm used by the MC68000 provides less than 10% difference between the best and worst case timings. MULS, MULU - The multiply algorithm requires 38+2n clocks where n is defined as: MULU:n=the number of ones in the MULS:n=concatanate the with a zero as the LSB; n is the resultant number of 10 or 01 patterns in the 17-bit source; i.e., worst case happens when the source is $5555. TABLE 5 IMMEDIATE INSTRUCTION EXECUTION TIMES --------------------------------------------------------- |Instruction| Size | op #,Dn | op #,An | op #,M | --------------------------------------------------------- | ADDI | Word | 8(2/0) | - | 12(2/1)+ | | | Long | 16(3/0) | - | 20(3/2)+ | --------------------------------------------------------- | ADDQ | Word | 4(1/0) | 8(1/0)* | 8(1/1)+ | | | Long | 8(1/0) | 8(1/0) | 12(1/2)+ | --------------------------------------------------------- | ANDI | Word | 8(2/0) | - | 12(2/1)+ | | | Long | 16(3/0) | - | 20(3/1)+ | --------------------------------------------------------- | CMPI | Word | 8(2/0) | - | 8(2/0)+ | | | Long | 14(3/0) | - | 12(3/0)+ | --------------------------------------------------------- | EORI | Word | 8(2/0) | - | 12(2/1)+ | | | Long | 16(3/0) | - | 20(3/2)+ | --------------------------------------------------------- | MOVEQ | Long | 4(1/0) | - | - | --------------------------------------------------------- | ORI | Word | 8(2/0) | - | 12(2/1)+ | | | Long | 16(3/0) | - | 20(3/2)+ | --------------------------------------------------------- | SUBI | Word | 8(2/0) | - | 12(2/1)+ | | | Long | 16(3/0) | - | 20(3/2)+ | --------------------------------------------------------- | SUBQ | Word | 4(1/0) | 8(1/0)* | 8(1/1)+ | | | Long | 8(1/0) | 8(1/0) | 12(1/2)+ | --------------------------------------------------------- + Add effective address calculation time * Word only TABLE 6 SINGLE OPERAND INSTRUCTION EXECUTION TIMES --------------------------------------------- |Instruction| Size | Register | Memory | --------------------------------------------- | CLR | Word | 4(1/0) | 8(1/1)+ | | | Long | 6(1/0) | 12(1/2)+ | --------------------------------------------- | NBCD | Byte | 6(1/0) | 8(1/1)+ | --------------------------------------------- | NEG | Word | 4(1/0) | 8(1/1)+ | | | Long | 6(1/0) | 12(1/2)+ | --------------------------------------------- | NEGX | Word | 4(1/0) | 8(1/1)+ | | | Long | 6(1/0) | 12(1/2)+ | --------------------------------------------- | NOT | Word | 4(1/0) | 8(1/1)+ | | | Long | 6(1/0) | 12(1/2)+ | --------------------------------------------- | Scc |Byte,F | 4(1/0) | 8(1/1)+ | | |Byte,T | 6(1/0) | 8(1/1)+ | --------------------------------------------- | TAS | Byte | 4(1/0) | 10(1/1)+ | --------------------------------------------- | TST | Word | 4(1/0) | 4(1/0)+ | | | Long | 4(1/0) | 4(1/0)+ | --------------------------------------------- + Add effective address calculation time TABLE 7 SHIFT/ROTATE INSTRUCTION EXECUTION TIMES --------------------------------------------- |Instruction| Size | Register | Memory | --------------------------------------------- | ASR, ASL | Word | 6+2n(1/0) | 8(1/1)+ | | | Long | 8+2n(1/0) | - | --------------------------------------------- | LSR, LSL | Word | 6+2n(1/0) | 8(1/1)+ | | | Long | 8+2n(1/0) | - | --------------------------------------------- | ROR, ROL | Word | 6+2n(1/0) | 8(1/1)+ | | | Long | 8+2n(1/0) | - | --------------------------------------------- | ROXR,ROXL | Word | 6+2n(1/0) | 8(1/1)+ | | | Long | 8+2n(1/0) | - | --------------------------------------------- + Add effective address calculation time n Is the shift count TABLE 8 BIT MANIPULATION INSTRUCTION EXECUTION TIMES --------------------------------------------------------------------- |Instruction| Size | Dynamic | Static | | | | Register | Memory | Register | Memory | --------------------------------------------------------------------- | BCHG | Byte | - | 8(1/1)+ | - | 12(2/1)+ | | | Long | 8(1/0)* | - | 12(2/0)* | - | --------------------------------------------------------------------- | BCLR | Byte | - | 8(1/1)+ | - | 12(2/1)+ | | | Long | 10(1/0)* | - | 14(2/0)* | - | --------------------------------------------------------------------- | BSET | Byte | - | 8(1/1)+ | - | 12(2/1)+ | | | Long | 8(1/0)* | - | 12(2/0)* | - | --------------------------------------------------------------------- | BTST | Byte | - | 4(1/0)+ | - | 8(2/0)+ | | | Long | 6(1/0) | - | 10(2/0) | - | --------------------------------------------------------------------- + Add effective address calculation time * Indicates maximum value TABLE 9 CONDITIONAL INSTRUCTION EXECUTION TIMES ------------------------------------------------- |Instruction|Displace- | Branch | Branch | | | ment | Taken | Not Taken | ------------------------------------------------- | Bcc | Byte | 10(2/0) | 8(1/0) | | | Word | 10(2/0) | 12(2/0) | ------------------------------------------------- | BRA | Byte | 10(2/0) | - | | | Word | 10(2/0) | - | ------------------------------------------------- | BSR | Byte | 18(2/2) | - | | | Word | 18(2/2) | - | ------------------------------------------------- | DBcc | Byte | - | 12(2/0) | | | Word | 10(2/0) | 14(3/0) | ------------------------------------------------- + Add effective address calculation time * Indicates maximum value TABLE 10 JMP, JSR, LEA, PEA AND MOVEM INSTRUCTION EXECUTION TIMES ------------------------------------------------------------------------------------------ |INSTR | SIZE | (An) | (An)+ | -(An) | d(An) |d(A,R)*| xxx.W | xxx.L | d(PC) |d(PC,R)*| ------------------------------------------------------------------------------------------ | JMP | - | 8(2/0)| - | - |10(2/0)|14(3/0)|10(2/0)|12(3/0)|10(2/0)| 14(3/0)| ------------------------------------------------------------------------------------------ | JSR | - |16(2/2)| - | - |18(2/2)|22(2/2)|18(2/2)|20(3/2)|18(2/2)| 22(2/2)| ------------------------------------------------------------------------------------------ | LEA | - | 4(1/0)| - | - | 8(2/0)|12(2/0)| 8(2/0)|12(3/0)| 8(2/0)| 12(2/0)| ------------------------------------------------------------------------------------------ | PEA | - |12(1/2)| - | - |16(2/2)|20(2/2)|16(2/2)|20(3/2)|16(2/2)| 20(2/2)| ------------------------------------------------------------------------------------------ | | Word | 12+4n | 12+4n | - | 16+4n | 18+4n | 16+4n | 20+4n | 16+4n | 18+4n | | MOVEM | | (3+n) | (3+n) | - | (4+n) | (4+n) | (4+n) | (5+n) | (4+n) | (4+n) | | |--------------------------------------------------------------------------------- | M->R | Long | 12+8n | 12+8n | - | 16+8n | 18+8n | 16+8n | 20+8n | 16+8n | 18+8n | | | |(3+2n) |(3+2n) | - | (4+2n)| (4+2n)| (4+2n)| (5+2n)| (4+2n)| (4+2n) | ------------------------------------------------------------------------------------------ | | Word | 8+4n | - | 8+4n | 12+4n | 14+4n | 12+4n | 16+4n | - | - | | MOVEM | | (2/n) | - | (2/n) | (3/n) | (3/n) | (3/n) | (4/n) | - | - | | |--------------------------------------------------------------------------------- | R->M | Long | 8+8n | - | 8+8n | 12+8n | 14+8n | 12+8n | 16+8n | - | - | | | | (2/2n)| - | (2/2n)| (3/2n)| (3/2n)| (3/2n)| (4/2n)| - | - | ------------------------------------------------------------------------------------------ n Is the number of registers to move * The size of the index register does not affect execution time TABLE 11 MULTI-PRECISION INSTRUCTION EXECUTION TIMES ------------------------------------------------- |Instruction| Size | op Dn,Dn | op M, M | ------------------------------------------------- | ADDX | Byte/Word | 4(1/0) | 18(3/1) | | | Long | 8(1/0) | 30(5/2) | ------------------------------------------------- | CMPM | Byte/Word | - | 12(3/0) | | | Long | - | 20(5/2) | ------------------------------------------------- | SUBX | Byte/Word | 4(1/0) | 18(3/1) | | | Long | 8(1/0) | 30(5/2) | ------------------------------------------------- | ABCD | Byte | 6(1/0) | 18(3/1) | ------------------------------------------------- | SBCD | Byte | 6(1/0) | 18(3/1) | ------------------------------------------------- TABLE 12 MISCELLANEOUS INSTRUCTION EXECUTION TIMES ------------------------------------------------- |Instruction| Size | Register | Memory | ------------------------------------------------- |ANDI TO CCR| Byte | 20(3/0) | - | ------------------------------------------------- |ANDI TO SR | Word | 20(3/0) | - | ------------------------------------------------- | CHK | - | 10(1/0)+ | - | ------------------------------------------------- |EORI TO CCR| Byte | 20(3/0) | - | ------------------------------------------------- |EORI TO SR | Word | 20(3/0) | - | ------------------------------------------------- |ORI TO CCR | Byte | 20(3/0) | - | ------------------------------------------------- | ORI TO SR | Word | 20(3/0) | - | ------------------------------------------------- |MOVE SR -> | - | 6(1/0) | 8(1/1)+ | ------------------------------------------------- |MOVE -> CCR| - | 12(2/0) | 12(2/0)+ | ------------------------------------------------- |MOVE -> SR | - | 12(2/0) | 12(2/0)+ | ------------------------------------------------- | EXG | - | 6(1/0) | - | ------------------------------------------------- | EXT | Word | 4(1/0) | - | | | Long | 4(1/0) | - | ------------------------------------------------- | LINK | - | 16(2/2) | - | ------------------------------------------------- |MOVE USP ->| - | 4(1/0) | - | ------------------------------------------------- |MOVE -> USP| - | 4(1/0) | - | ------------------------------------------------- | NOP | - | 4(1/0) | - | ------------------------------------------------- | RESET | - | 132(1/0) | - | ------------------------------------------------- | RTE | - | 20(5/0) | - | ------------------------------------------------- | RTR | - | 20(5/0) | - | ------------------------------------------------- | RTS | - | 16(4/0) | - | ------------------------------------------------- | STOP | - | 4(1/0) | - | ------------------------------------------------- | SWAP | - | 4(1/0) | - | ------------------------------------------------- | TRAPV | - | 4(1/0) | - | ------------------------------------------------- | UNLK | - | 12(3/0) | - | ------------------------------------------------- + Add effective address calculation time TABLE 13 MOVE PHERIPHERAL INSTRUCTION EXECUTION TIMES ------------------------------------------------- |Instruction| Size | Reg->Mem | Mem->Reg | ------------------------------------------------- | MOVEP | Word | 16(2/2) | 16(4/0) | | | Long | 24(2/4) | 24(6/0) | -------------------------------------------------